Line data Source code
1 : // boost test header
2 : #include <boost/test/unit_test.hpp>
3 :
4 : // mock HAL
5 : #include "ModuleFixture.hpp"
6 :
7 : BOOST_FIXTURE_TEST_SUITE(suite_Module, ModuleFixture)
8 :
9 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIgetRegValue_reg, ModuleFixture)
10 : {
11 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIgetRegValue register access ---");
12 : int16_t ret;
13 :
14 : // basic register read with default config
15 1 : const uint8_t address = 0x12;
16 1 : const uint8_t spiTxn[] = { address, 0x00 };
17 1 : ret = mod->SPIgetRegValue(address);
18 :
19 : // check return code, value and history log
20 1 : BOOST_TEST(ret >= RADIOLIB_ERR_NONE);
21 1 : BOOST_TEST(ret == EMULATED_RADIO_SPI_RETURN);
22 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
23 :
24 : // register read masking test
25 1 : const uint8_t msb = 5;
26 1 : const uint8_t lsb = 1;
27 1 : const uint8_t maskedValue = 0x3E;
28 1 : ret = mod->SPIgetRegValue(address, msb, lsb);
29 1 : BOOST_TEST(ret == maskedValue);
30 :
31 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
32 1 : ret = mod->SPIgetRegValue(address, lsb, msb);
33 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
34 1 : ret = mod->SPIgetRegValue(address, 10, lsb);
35 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
36 1 : ret = mod->SPIgetRegValue(address, msb, 10);
37 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
38 1 : }
39 :
40 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIsetRegValue_reg, ModuleFixture)
41 : {
42 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIsetRegValue register access ---");
43 : int16_t ret;
44 :
45 : // basic register write with default config
46 1 : const uint8_t address = 0x12;
47 1 : const uint8_t value = 0xAB;
48 1 : const uint8_t spiTxn[] = { address, 0x00, 0x80 | address, value };
49 1 : ret = mod->SPIsetRegValue(address, value);
50 :
51 : // check return code and history log
52 : // this will return write error because the bare emulated radio has no internal logic
53 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
54 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
55 :
56 : // register write masking test
57 1 : const uint8_t msb = 5;
58 1 : const uint8_t lsb = 1;
59 1 : const uint8_t maskedValue = 0xEB;
60 1 : const uint8_t spiTxn2[] = { address, 0x00, 0x80 | address, maskedValue };
61 1 : ret = mod->SPIsetRegValue(address, value, msb, lsb);
62 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
63 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn2, sizeof(spiTxn2)) == 0);
64 :
65 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
66 1 : ret = mod->SPIsetRegValue(address, value, lsb, msb);
67 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
68 1 : ret = mod->SPIsetRegValue(address, value, 10, lsb);
69 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
70 1 : ret = mod->SPIsetRegValue(address, value, msb, 10);
71 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
72 :
73 : // check interval test
74 1 : const uint8_t interval = 200;
75 1 : const unsigned long start = hal->micros();
76 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, interval);
77 1 : const unsigned long stop = hal->micros();
78 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
79 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
80 1 : const unsigned long elapsed = stop - start;
81 1 : BOOST_TEST(elapsed >= (unsigned long)interval*1000UL);
82 :
83 : // disabled check mask test
84 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0);
85 1 : BOOST_TEST(ret == RADIOLIB_ERR_NONE);
86 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
87 :
88 : // forced write test
89 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0xFF, true);
90 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
91 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
92 1 : }
93 :
94 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIgetRegValue_stream, ModuleFixture)
95 : {
96 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIgetRegValue stream access ---");
97 : int16_t ret;
98 :
99 : // change settings to stream type
100 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = Module::BITS_16;
101 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = Module::BITS_8;
102 1 : mod->spiConfig.statusPos = 1;
103 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
104 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
105 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
106 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
107 1 : mod->spiConfig.stream = true;
108 :
109 : // basic register read
110 1 : const uint8_t address = 0x12;
111 1 : const uint8_t spiTxn[] = { RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00 };
112 1 : ret = mod->SPIgetRegValue(address);
113 :
114 : // check return code, value and history log
115 1 : BOOST_TEST(ret >= RADIOLIB_ERR_NONE);
116 1 : BOOST_TEST(ret == EMULATED_RADIO_SPI_RETURN);
117 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
118 :
119 : // register read masking test
120 1 : const uint8_t msb = 5;
121 1 : const uint8_t lsb = 1;
122 1 : const uint8_t maskedValue = 0x3E;
123 1 : ret = mod->SPIgetRegValue(address, msb, lsb);
124 1 : BOOST_TEST(ret == maskedValue);
125 :
126 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
127 1 : ret = mod->SPIgetRegValue(address, lsb, msb);
128 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
129 1 : ret = mod->SPIgetRegValue(address, 10, lsb);
130 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
131 1 : ret = mod->SPIgetRegValue(address, msb, 10);
132 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
133 1 : }
134 :
135 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIsetRegValue_stream, ModuleFixture)
136 : {
137 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIsetRegValue stream access ---");
138 : int16_t ret;
139 :
140 : // change settings to stream type
141 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = Module::BITS_16;
142 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = Module::BITS_8;
143 1 : mod->spiConfig.statusPos = 1;
144 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
145 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
146 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
147 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
148 1 : mod->spiConfig.stream = true;
149 :
150 : // basic register write with default config
151 1 : const uint8_t address = 0x12;
152 1 : const uint8_t value = 0xAB;
153 1 : const uint8_t spiTxn[] = {
154 : RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00,
155 : RADIOLIB_SX126X_CMD_WRITE_REGISTER, 0x00, address, value,
156 : };
157 1 : ret = mod->SPIsetRegValue(address, value);
158 :
159 : // check return code and history log
160 : // this will return write error because the bare emulated radio has no internal logic
161 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
162 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
163 :
164 : // register write masking test
165 1 : const uint8_t msb = 5;
166 1 : const uint8_t lsb = 1;
167 1 : const uint8_t maskedValue = 0xEB;
168 1 : const uint8_t spiTxn2[] = {
169 : RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00,
170 : RADIOLIB_SX126X_CMD_WRITE_REGISTER, 0x00, address, maskedValue,
171 : };
172 1 : ret = mod->SPIsetRegValue(address, value, msb, lsb);
173 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
174 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn2, sizeof(spiTxn2)) == 0);
175 :
176 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
177 1 : ret = mod->SPIsetRegValue(address, value, lsb, msb);
178 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
179 1 : ret = mod->SPIsetRegValue(address, value, 10, lsb);
180 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
181 1 : ret = mod->SPIsetRegValue(address, value, msb, 10);
182 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
183 :
184 : // check interval test
185 1 : const uint8_t interval = 200;
186 1 : const unsigned long start = hal->micros();
187 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, interval);
188 1 : const unsigned long stop = hal->micros();
189 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
190 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
191 1 : const unsigned long elapsed = stop - start;
192 1 : BOOST_TEST(elapsed >= (unsigned long)interval*1000UL);
193 :
194 : // disabled check mask test
195 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0);
196 1 : BOOST_TEST(ret == RADIOLIB_ERR_NONE);
197 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
198 :
199 : // forced write test
200 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0xFF, true);
201 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
202 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
203 1 : }
204 :
205 : BOOST_AUTO_TEST_SUITE_END()
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