Line data Source code
1 : // boost test header
2 : #include <boost/test/unit_test.hpp>
3 :
4 : // mock HAL
5 : #include "TestHal.hpp"
6 :
7 : // testing fixture
8 : struct ModuleFixture {
9 : TestHal* hal = nullptr;
10 : Module* mod = nullptr;
11 : EmulatedRadio* radioHardware = nullptr;
12 :
13 4 : ModuleFixture() {
14 4 : BOOST_TEST_MESSAGE("--- Module fixture setup ---");
15 4 : hal = new TestHal();
16 4 : radioHardware = new EmulatedRadio();
17 4 : hal->connectRadio(radioHardware);
18 :
19 4 : mod = new Module(hal, EMULATED_RADIO_NSS_PIN, EMULATED_RADIO_IRQ_PIN, EMULATED_RADIO_RST_PIN, EMULATED_RADIO_GPIO_PIN);
20 4 : mod->init();
21 4 : }
22 :
23 4 : ~ModuleFixture() {
24 4 : BOOST_TEST_MESSAGE("--- Module fixture teardown ---");
25 4 : mod->term();
26 4 : delete[] mod;
27 4 : delete[] hal;
28 4 : }
29 : };
30 :
31 : BOOST_FIXTURE_TEST_SUITE(suite_Module, ModuleFixture)
32 :
33 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIgetRegValue_reg, ModuleFixture)
34 : {
35 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIgetRegValue register access ---");
36 : int16_t ret;
37 :
38 : // basic register read with default config
39 1 : const uint8_t address = 0x12;
40 1 : const uint8_t spiTxn[] = { address, 0x00 };
41 1 : ret = mod->SPIgetRegValue(address);
42 :
43 : // check return code, value and history log
44 1 : BOOST_TEST(ret >= RADIOLIB_ERR_NONE);
45 1 : BOOST_TEST(ret == EMULATED_RADIO_SPI_RETURN);
46 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
47 :
48 : // register read masking test
49 1 : const uint8_t msb = 5;
50 1 : const uint8_t lsb = 1;
51 1 : const uint8_t maskedValue = 0x3E;
52 1 : ret = mod->SPIgetRegValue(address, msb, lsb);
53 1 : BOOST_TEST(ret == maskedValue);
54 :
55 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
56 1 : ret = mod->SPIgetRegValue(address, lsb, msb);
57 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
58 1 : ret = mod->SPIgetRegValue(address, 10, lsb);
59 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
60 1 : ret = mod->SPIgetRegValue(address, msb, 10);
61 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
62 1 : }
63 :
64 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIsetRegValue_reg, ModuleFixture)
65 : {
66 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIsetRegValue register access ---");
67 : int16_t ret;
68 :
69 : // basic register write with default config
70 1 : const uint8_t address = 0x12;
71 1 : const uint8_t value = 0xAB;
72 1 : const uint8_t spiTxn[] = { address, 0x00, 0x80 | address, value };
73 1 : ret = mod->SPIsetRegValue(address, value);
74 :
75 : // check return code and history log
76 : // this will return write error because the bare emulated radio has no internal logic
77 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
78 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
79 :
80 : // register write masking test
81 1 : const uint8_t msb = 5;
82 1 : const uint8_t lsb = 1;
83 1 : const uint8_t maskedValue = 0xEB;
84 1 : const uint8_t spiTxn2[] = { address, 0x00, 0x80 | address, maskedValue };
85 1 : ret = mod->SPIsetRegValue(address, value, msb, lsb);
86 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
87 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn2, sizeof(spiTxn2)) == 0);
88 :
89 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
90 1 : ret = mod->SPIsetRegValue(address, value, lsb, msb);
91 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
92 1 : ret = mod->SPIsetRegValue(address, value, 10, lsb);
93 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
94 1 : ret = mod->SPIsetRegValue(address, value, msb, 10);
95 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
96 :
97 : // check interval test
98 1 : const uint8_t interval = 200;
99 1 : const unsigned long start = hal->micros();
100 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, interval);
101 1 : const unsigned long stop = hal->micros();
102 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
103 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
104 1 : const unsigned long elapsed = stop - start;
105 1 : BOOST_TEST(elapsed >= (unsigned long)interval*1000UL);
106 :
107 : // disabled check mask test
108 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0);
109 1 : BOOST_TEST(ret == RADIOLIB_ERR_NONE);
110 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
111 :
112 : // forced write test
113 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0xFF, true);
114 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
115 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
116 1 : }
117 :
118 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIgetRegValue_stream, ModuleFixture)
119 : {
120 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIgetRegValue stream access ---");
121 : int16_t ret;
122 :
123 : // change settings to stream type
124 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = Module::BITS_16;
125 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = Module::BITS_8;
126 1 : mod->spiConfig.statusPos = 1;
127 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
128 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
129 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
130 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
131 1 : mod->spiConfig.stream = true;
132 :
133 : // basic register read
134 1 : const uint8_t address = 0x12;
135 1 : const uint8_t spiTxn[] = { RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00 };
136 1 : ret = mod->SPIgetRegValue(address);
137 :
138 : // check return code, value and history log
139 1 : BOOST_TEST(ret >= RADIOLIB_ERR_NONE);
140 1 : BOOST_TEST(ret == EMULATED_RADIO_SPI_RETURN);
141 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
142 :
143 : // register read masking test
144 1 : const uint8_t msb = 5;
145 1 : const uint8_t lsb = 1;
146 1 : const uint8_t maskedValue = 0x3E;
147 1 : ret = mod->SPIgetRegValue(address, msb, lsb);
148 1 : BOOST_TEST(ret == maskedValue);
149 :
150 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
151 1 : ret = mod->SPIgetRegValue(address, lsb, msb);
152 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
153 1 : ret = mod->SPIgetRegValue(address, 10, lsb);
154 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
155 1 : ret = mod->SPIgetRegValue(address, msb, 10);
156 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
157 1 : }
158 :
159 2 : BOOST_FIXTURE_TEST_CASE(Module_SPIsetRegValue_stream, ModuleFixture)
160 : {
161 1 : BOOST_TEST_MESSAGE("--- Test Module::SPIsetRegValue stream access ---");
162 : int16_t ret;
163 :
164 : // change settings to stream type
165 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = Module::BITS_16;
166 1 : mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = Module::BITS_8;
167 1 : mod->spiConfig.statusPos = 1;
168 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
169 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
170 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
171 1 : mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
172 1 : mod->spiConfig.stream = true;
173 :
174 : // basic register write with default config
175 1 : const uint8_t address = 0x12;
176 1 : const uint8_t value = 0xAB;
177 1 : const uint8_t spiTxn[] = {
178 : RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00,
179 : RADIOLIB_SX126X_CMD_WRITE_REGISTER, 0x00, address, value,
180 : };
181 1 : ret = mod->SPIsetRegValue(address, value);
182 :
183 : // check return code and history log
184 : // this will return write error because the bare emulated radio has no internal logic
185 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
186 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
187 :
188 : // register write masking test
189 1 : const uint8_t msb = 5;
190 1 : const uint8_t lsb = 1;
191 1 : const uint8_t maskedValue = 0xEB;
192 1 : const uint8_t spiTxn2[] = {
193 : RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00,
194 : RADIOLIB_SX126X_CMD_WRITE_REGISTER, 0x00, address, maskedValue,
195 : };
196 1 : ret = mod->SPIsetRegValue(address, value, msb, lsb);
197 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
198 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn2, sizeof(spiTxn2)) == 0);
199 :
200 : // invalid mask tests (swapped MSB and LSB, out of range bit masks)
201 1 : ret = mod->SPIsetRegValue(address, value, lsb, msb);
202 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
203 1 : ret = mod->SPIsetRegValue(address, value, 10, lsb);
204 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
205 1 : ret = mod->SPIsetRegValue(address, value, msb, 10);
206 1 : BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
207 :
208 : // check interval test
209 1 : const uint8_t interval = 200;
210 1 : const unsigned long start = hal->micros();
211 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, interval);
212 1 : const unsigned long stop = hal->micros();
213 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
214 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
215 1 : const unsigned long elapsed = stop - start;
216 1 : BOOST_TEST(elapsed >= (unsigned long)interval*1000UL);
217 :
218 : // disabled check mask test
219 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0);
220 1 : BOOST_TEST(ret == RADIOLIB_ERR_NONE);
221 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
222 :
223 : // forced write test
224 1 : ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0xFF, true);
225 1 : BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
226 1 : BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
227 1 : }
228 :
229 : BOOST_AUTO_TEST_SUITE_END()
|